KB00010 - BDI2000/3000 - Pass Through JTAG Scan ChainQuestion:
Can the Abatron BDI2000 or BDI3000 be attached to a board that has a JTAG scan chain?
In other words, our board will have a PowerPC and may have some other JTAG-capable devices that are all hooked up to the same scan chain and accessed through one JTAG header. This will be used for boundary scan in functional test but we'd like to use the same header for debugging with the BDI emulator.
The BDI probes have no problem passing thru various devices you may have on your JTAG scan chain to get to your embedded CPU with most frimware options available. This is a common issue that we run into all the time and we've never had a problem as long as your JTAG design is clean. For more information, you can review Abatron User's Manual specific to the Firmware you are using.
The latest release of bdiGDB-PPC6xx/7xx/74xx/82xx is one set of firmware that is able to handle additional devices on the JTAG scan chain. The Maximum is 8 device before the target CPU and 8 after. It is important to note that users can only debug one PPC at a time. There is no real multi-core debugging like what is available for the ARM7/9, ARM11-Cortex, PPC4xx & MIPS64.
Hits : 278
KB00118 - Define Core Status/PlatformStatus/SAP Status#define JTAG_REQUIREMENT 0x01
#define CORE_STOPPED 0x04
#define CORE_HALTED 0x08
#define CORE_ABIST_FAIL 0x10
#define CORE_ABIST_BUSY 0x20
#define CORE_SVC_BUS_DONE 0x40
#define CORE_SVC_BUS_FAIL 0x80
#define SAP_STOPPED 0x81
#define SAP_READ_UNDERFLOW 0x41
#define SAP_WRITE_OVERFLOW 0x21
#define SAP_CORRUPT_READ 0x11
#define SAP_READ_READY 0x09
#define SAP_VALID_STATUS 0x05
#define PLAT_STOPPED 0x04
#define PLAT_RUNN_DONE 0x08
#define PLAT_SVC_DONE 0x10
#define PLAT_SVC_FAIL 0x20
#define PLAT_MBIST_RUNNING 0x40
#define PLAT_MBIST_DONE 0x80
#define PLAT_MBIST_FAILED 0xC0
Note: don't know the exact meaning of each bit. We are mainly interested in the CORE_HALTED bit.
The LSB is always set, this a JTAG requirement.
A Core status of 0x0041 simply means that it has not entered debug mode. Maybe the core has not even started because of some missing clocks or other causes that prevents it from booting.Hits : 291
KB00138 - BDI2000/3000 Low Level JTAG Commands to analyze your JTAG Scan Chain
I need to by pass a device that is in my JTAG scan chain to get to my CPU. Does the BDI probe allow me to do this?
Yes. From the BDI prompt, use the low level "JTAG" command to investigate the JTAG scan chain:
JTAG> xir 32 ffffffff
JTAG> xdr 32 00010000
This will tell us how many devices are on the scan chain and hopefully also the IR size of the device(s).Hits : 222
KB00159 - Problems connecting BDI to Broadcom's XLP2 CPU
I am using my BDI2000/3000 to target a Broadcom XLP432 CPU and I am having problems targeting my new XLP2 (XLP764, single chip version of the XLP2 with 64 threads). I am able to put the target to debug mode using the original configuration file Abatron provides and apply a hardware reset.
However, it was just a partial success. The North Bridge, on bus0, looked fine but everything else was just 0xffffffff.
This is a bug in the Silicon. Apparently, you need to write to a special register before you can see all the other devices on the secondary bus. What I did was "mmw 0x18000124 0x100". That did the magic.Hits : 57
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